The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 16, 2025
Filed:
Apr. 26, 2023
Applicant:
SK Hynix Inc., Icheon-si, KR;
Inventors:
Jong Hoon Lee, Icheon-si, KR;
Se Chun Park, Icheon-si, KR;
Assignee:
SK hynix Inc., Icheon-si, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/34 (2006.01); G06F 3/06 (2006.01); G11C 16/10 (2006.01); G11C 16/24 (2006.01); G11C 16/32 (2006.01); G11C 16/34 (2006.01); G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
G11C 16/3459 (2013.01); G06F 3/0619 (2013.01); G06F 3/0656 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01); G11C 16/10 (2013.01); G11C 16/24 (2013.01); G11C 16/32 (2013.01); G11C 16/0483 (2013.01);
Abstract
A memory device includes a plurality of memory cells programmed to a first program state through a plurality of program loops, a page buffer configured to perform a verify operation of verifying the first program state in each of the plurality of program loops, and control logic configured to, as the plurality of program loops are sequentially performed, adjust a first evaluation time of a first evaluation operation so as to decrease the difference between a second evaluation time of a second evaluation operation and the first evaluation time.