The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 09, 2025

Filed:

Jun. 11, 2024
Applicant:

Sambanova Systems, Inc., Palo Alto, CA (US);

Inventors:

Raghunath Shenbagam, San Jose, CA (US);

Ravinder Kumar, Fremont, CA (US);

Assignee:

SambaNova Systems, Inc., Palo Alto, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 47/28 (2022.01); G06F 9/445 (2018.01); G06F 9/455 (2018.01); G06F 9/50 (2006.01); G06F 15/78 (2006.01); H04L 41/0895 (2022.01); H04L 41/0896 (2022.01); H04L 45/745 (2022.01); H04L 49/10 (2022.01);
U.S. Cl.
CPC ...
H04L 47/28 (2013.01); G06F 9/44505 (2013.01); G06F 9/45558 (2013.01); G06F 9/5044 (2013.01); G06F 9/5077 (2013.01); G06F 15/7892 (2013.01); H04L 41/0896 (2013.01); H04L 49/10 (2013.01); G06F 2009/4557 (2013.01); G06F 2009/45595 (2013.01); G06F 2209/5011 (2013.01); G06F 2213/0062 (2013.01); G06F 2213/0064 (2013.01); H04L 41/0895 (2022.05); H04L 45/745 (2013.01);
Abstract

The disclosed technology relates to link-based resource allocation for a pool of reconfigurable processors. Resource allocation is provided for reconfigurable processors based on link bandwidths and link latencies. Runtime logic receives target link bandwidth and target link latency and rated link bandwidth and rated link latency. In response, the runtime logic allocates configuration files for an application, reconfigurable processors, and links between the processors. The runtime logic executes the allocated configuration files using the allocated processors and the allocated links. In another embodiment, the pool of reconfigurable processors comprise a cluster of processing nodes connected through a network.


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