Modified manchester encoding for ultra-low power interfaces

Abstract

The present disclosure relates generally to an interface between a host processor device and a peripheral device, such as a camera or sensor, and, more particularly, to improving the generation of data signals with embedded clock information to be more rate-flexible and power efficient. Improved techniques are described herein to embed a clock signal into a data signal (e.g., to minimize the number of channels needed)—while allowing for a variable link rate and avoiding the need for a phase lock loop (PLL) and/or long link training times at the receiver, which can consume large amounts of power and on-chip area. In some embodiments, a modified Manchester encoding scheme, e.g., using a fixed delay for its mid-bit transitions (and wherein the delay is independent of link rate), is used to achieve the dual aims of rate flexibility and power efficiency for an improved data signal interface with embedded clock information.