The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 09, 2025

Filed:

Jan. 28, 2020
Applicant:

Ricoh Company, Ltd., Tokyo, JP;

Inventors:

Misaki Ishida, Kanagawa, JP;

Naoto Jikutani, Miyagi, JP;

Kazuma Izumiya, Miyagi, JP;

Assignee:

RICOH COMPANY, LTD., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01S 5/00 (2006.01); H01S 5/02253 (2021.01); H01S 5/0234 (2021.01); H01S 5/0237 (2021.01); H01S 5/042 (2006.01); H01S 5/183 (2006.01); H01S 5/42 (2006.01); G01S 7/481 (2006.01);
U.S. Cl.
CPC ...
H01S 5/423 (2013.01); H01S 5/005 (2013.01); H01S 5/02253 (2021.01); H01S 5/0234 (2021.01); H01S 5/0237 (2021.01); H01S 5/04256 (2019.08); H01S 5/18305 (2013.01); G01S 7/4814 (2013.01);
Abstract

A surface emitting laser module includes a base substrate, a surface emitting laser substrate mounted on the base substrate, the surface emitting laser substrate including a surface emitting laser element, and the surface emitting laser substrate having a first face facing the base substrate and a second face facing away from the base substrate, and an optical member facing the second face and including an optical element configured to receive light emitted from the second face of the surface emitting laser element. The surface emitting laser element includes a first semiconductor layer, a second semiconductor layer, a first electrode provided on the first face and connected to the first semiconductor layer, and a second electrode provided on the first face and connected to the second semiconductor layer. The base substrate includes a third electrode connected to the first electrode and a fourth electrode connected to the second electrode.


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