The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 09, 2025

Filed:

Aug. 25, 2022
Applicant:

Stmicroelectronics S.r.l., Agrate Brianza, IT;

Inventors:

Antonio Bellizzi, Milan, IT;

Guendalina Catalano, Augusta, IT;

Assignee:

STMICROELECTRONICS S.r.l., Agrate Brianza, IT;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/31 (2006.01); H01L 21/56 (2006.01); H01L 21/683 (2006.01); H01L 23/29 (2006.01); H01L 23/495 (2006.01); H01L 25/065 (2023.01);
U.S. Cl.
CPC ...
H01L 23/3121 (2013.01); H01L 21/56 (2013.01); H01L 21/6836 (2013.01); H01L 23/293 (2013.01); H01L 23/49527 (2013.01); H01L 25/0655 (2013.01);
Abstract

A semiconductor device comprises: one or more semiconductor dice arranged on a substrate such as a leadframe, an insulating encapsulation of, e.g., LDS material molded onto the semiconductor die or dice arranged on the substrate, the encapsulation having a surface opposite the substrate, and electrically conductive formations (e.g., die-to-leador die-to-die) provided in the encapsulation and coupled to the semiconductor die or dice arranged on the substrate. A tape is laminated onto the surface of the encapsulation opposite the substrate and electrically conductive contacts to the electrically conductive formations extend through the tape laminated onto the encapsulation. The length of the electrically conductive contacts is thus reduced to the thickness of the tape laminated onto the encapsulation, thus facilitating producing, e.g., 'vertical' MOSFET power devices having a reduced drain-source “on” resistance, RDS.


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