Multi-bit writing and verification in semiconductor memory device

Abstract

A semiconductor memory device includes a memory string and a control circuit. The memory string includes a first memory cell connected to a first word line and a second memory cell adjacent to the first memory cell and connected to a second word line. The control circuit is configured to perform a multi-bit-data writing with respect to each of the first and second memory cells. The multi-bit-data writing includes, in order, a first programming to program the first memory cell, the first programming with respect to the second memory cell, a reading of first data from the first memory cell, a second programming to program the second memory cell, and a verification of data programmed in the second memory cell. The control circuit is configured to set a verify voltage to be applied to the second word line during the verification based on the first data.