The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 09, 2025
Filed:
Mar. 01, 2023
Cypress Semiconductor Corporation, San Jose, CA (US);
Adrian Lin, Austin, TX (US);
Cypress Semiconductor Corporation, San Jose, CA (US);
Abstract
A low-dropout (LDO) regulator includes a voltage reference node and a one-stage differential amplifier coupled to the voltage reference node. The one-stage differential amplifier includes: a differential pair of NMOS transistors; a mirroring load comprising a first current source and a PMOS transistor; a direct feed-forward (DFF) loop formed by the PMOS transistor and its parasitic gate-to-drain capacitance during a load transient; and an indirect regulation feedback (IRF) loop formed by the differential pair of NMOS transistors, a resistor, and the PMOS transistor to provide direct current (DC) voltage regulation.