The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 02, 2025

Filed:

Jun. 24, 2021
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Zaichen Chen, Dallas, TX (US);

Akram Ali Salman, Plano, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H10D 12/00 (2025.01); H10D 12/01 (2025.01); H10D 30/65 (2025.01); H10D 62/10 (2025.01);
U.S. Cl.
CPC ...
H10D 12/411 (2025.01); H10D 12/01 (2025.01); H10D 30/65 (2025.01); H10D 62/127 (2025.01);
Abstract

An integrated circuit includes a semiconductor substrate having a doped region, e.g. a DWELL, with a first conductivity type. A source region is located within the doped region, the source region having a second opposite conductivity type. A drain region having the second conductivity type is spaced apart from the source region. A gate electrode is located between the source region and the drain region, the gate electrode partially overlapping the doped region. A body region having the first conductivity type is located within the doped region. A dielectric layer forms a closed path around the body region.


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