The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 02, 2025

Filed:

Nov. 29, 2022
Applicant:

Allegro Microsystems, Llc, Manchester, NH (US);

Inventors:

Christy Looby, Musselburgh, GB;

Colin Hall, West Linton, GB;

James Mcintosh, East Lothian, GB;

Assignee:

Allegro MicroSystems, LLC, Manchester, NH (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/26 (2006.01); G06F 1/3296 (2019.01);
U.S. Cl.
CPC ...
G06F 1/266 (2013.01); G06F 1/3296 (2013.01);
Abstract

An interface circuit, comprising: I/O circuitry configured to couple one or more first terminals with one or more second terminals; a voltage regulator configured to power the I/O circuitry; a restrictor element that is disposed between the voltage regulator and the I/O circuitry, the restrictor element being disposed on a circuit path that connects the voltage regulator to the I/O circuitry, the restrictor element being configured to open the circuit path and disconnect the voltage regulator from the I/O circuitry when an electrical current that is being supplied to the I/O circuitry exceeds a threshold; and a voltage suppressor that is disposed on the circuit path that connects the voltage regulator to the I/O circuitry, the voltage suppressor being disposed between the restrictor element and the I/O circuitry, the voltage suppressor being configured to limit, to a first voltage value, a voltage that is input into the I/O circuitry.


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