Vertical channel semiconductor device with ferroelectric-insulator gate stack

Abstract

A semiconductor device includes a plurality of first conductive lines extending in a first direction and spaced apart from each other in a second direction intersecting the first direction, the first direction and second direction being horizontal directions, a plurality of vertical semiconductor patterns disposed on the plurality of first conductive lines, respectively, a gate electrode crossing the plurality of first conductive lines and penetrating each of the plurality of vertical semiconductor patterns, a ferroelectric pattern between the gate electrode and each of the plurality of vertical semiconductor patterns, and a gate insulating pattern between the ferroelectric pattern and each of the plurality of vertical semiconductor patterns.