The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 26, 2025

Filed:

Jun. 25, 2024
Applicant:

Navitas Semiconductor Limited, Dublin, IE;

Inventors:

Santosh Sharma, Austin, TX (US);

Daniel M. Kinzer, El Segundo, CA (US);

Ren Huei Tzeng, Redondo Beach, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 17/082 (2006.01); G05F 3/26 (2006.01); H03K 17/687 (2006.01); H10D 62/85 (2025.01);
U.S. Cl.
CPC ...
H03K 17/0822 (2013.01); G05F 3/262 (2013.01); H03K 17/6871 (2013.01); H10D 62/8503 (2025.01);
Abstract

An electronic device includes a semiconductor substrate and a bidirectional transistor switch formed on the substrate, the bidirectional switch including a first source node, a second source node and a common drain node. A first transistor is formed on the substrate and includes a first source terminal, a first drain terminal and a first gate terminal, wherein the first source terminal is connected to the substrate, the first drain terminal is connected to the first source node and the first gate terminal is connected to the second source node. A second transistor is formed on the substrate and includes a second source terminal, a second drain terminal and a second gate terminal, wherein the second source terminal is connected to the substrate, the second drain terminal is connected to the second source node and the second gate terminal is connected to the first source node.


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