The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 26, 2025

Filed:

Apr. 29, 2022
Applicant:

Huawei Technologies Co., Ltd., Shenzhen, CN;

Inventors:

Tonglong Zhang, Shenzhen, CN;

Xiaodong Zhang, Shenzhen, CN;

Yong Guan, Shanghai, CN;

Simin Wang, Shanghai, CN;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 25/10 (2006.01);
U.S. Cl.
CPC ...
H01L 24/08 (2013.01); H01L 24/09 (2013.01); H01L 24/80 (2013.01); H01L 24/81 (2013.01); H01L 25/105 (2013.01); H01L 24/05 (2013.01); H01L 24/16 (2013.01); H01L 24/17 (2013.01); H01L 24/32 (2013.01); H01L 24/33 (2013.01); H01L 24/73 (2013.01); H01L 24/96 (2013.01); H01L 24/97 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/0801 (2013.01); H01L 2224/08057 (2013.01); H01L 2224/08148 (2013.01); H01L 2224/0903 (2013.01); H01L 2224/09051 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/1703 (2013.01); H01L 2224/17051 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/3303 (2013.01); H01L 2224/33051 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/80203 (2013.01); H01L 2224/80805 (2013.01); H01L 2224/80895 (2013.01); H01L 2224/80896 (2013.01); H01L 2224/81203 (2013.01); H01L 2224/81805 (2013.01); H01L 2224/81815 (2013.01); H01L 2225/1023 (2013.01); H01L 2225/1041 (2013.01); H01L 2225/107 (2013.01); H01L 2225/1094 (2013.01);
Abstract

A chip package on package structure includes a primary chip stack unit having pins insulated and spaced from each other on a first surface; a first bonding layer disposed on the first surface, where the first bonding layer includes bonding components insulated and spaced from each other, each bonding component includes a bonding part, and any two bonding parts are insulated and have a same cross-sectional area, and the bonding components are separately bonded to the pins; and secondary chip stack units, disposed on a surface of a side that is of the first bonding layer and that is away from the primary chip stack unit, where the secondary chip stack unit has micro bumps insulated and spaced from each other, and each of the micro bumps is bonded to one of the bonding components.


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