The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 26, 2025

Filed:

Dec. 12, 2022
Applicant:

Amazon Technologies, Inc., Seattle, WA (US);

Inventors:

Sharukh Shahajahan Shaikh, San Jose, CA (US);

Fnu Arun Kumar, Palo Alto, CA (US);

Kun Xu, Austin, TX (US);

Assignee:

Amazon Technologies, Inc., Seattle, WA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/392 (2020.01); H01L 23/538 (2006.01); H01L 25/065 (2023.01);
U.S. Cl.
CPC ...
G06F 30/392 (2020.01); H01L 23/5382 (2013.01); H01L 23/5386 (2013.01); H01L 25/0655 (2013.01);
Abstract

An interconnect fabric in an integrated circuit (IC) device can be hierarchically partitioned into a set of peripheral sub-fabrics and a glue sub-fabric coupled to each of the peripheral sub-fabrics based on the physical design information associated with the IC device. Each of the peripheral sub-fabrics and the glue sub-fabric can be implemented using 2:1 hierarchical multiplexers based on an agglomerative clustering scheme. Physically aware design of the hierarchical multiplexer tree along with the optimal placement of the 2:1 multiplexers can provide smaller overall wire length and reduced routing congestion in the interconnect.


Find Patent Forward Citations

Loading…