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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12399214 B1

PDFFull Text
Date of Patent:
Aug. 26, 2025

Filed:

Mar. 10, 2022

Systems, devices, and methods for testing integrated circuits in their native environments

Applicant:

Sandisk Technologies, Inc., Milpitas, CA (US);

Inventors:

Nadav Tsur, Bet Herut, IL;

Avi Shani, Petach Tikva, IL;

Yair Sommer, Even Yehuda, IL;

Assignee:

Sandisk Technologies, Inc., Milpitas, CA (US);

Attorney:

PATTERSON + SHERIDAN, LLP

Primary Examiner:

Ishwarbhai B Patel

Int. Cl.
CPC ...
H05K 1/02 (2006.01); B23K 1/00 (2006.01); G01R 31/28 (2006.01); H05K 1/11 (2006.01); H05K 1/18 (2006.01); H05K 3/34 (2006.01); H05K 3/36 (2006.01); B23K 101/42 (2006.01); H05K 1/03 (2006.01); H05K 1/14 (2006.01);
U.S. Cl.
CPC ...
G01R 31/2886 (2013.01); B23K 1/0016 (2013.01); H05K 1/0268 (2013.01); H05K 3/3436 (2013.01); H05K 3/363 (2013.01); B23K 2101/42 (2018.08); H05K 1/0393 (2013.01); H05K 1/111 (2013.01); H05K 1/115 (2013.01); H05K 1/14 (2013.01); H05K 1/18 (2013.01); H05K 2201/09127 (2013.01);
Abstract

Disclosed herein are unitary printed circuit boards (PCBs) and methods of using them for testing an integrated circuit (IC). In some embodiments, a unitary PCB comprises a main board portion and a flexible PCB portion, which are configured to be detached from each other at a separation location on the unitary PCB. The main board portion comprises a plurality of pads, and the flexible PCB portion comprises a plurality of through-holes, where a layout of the through-holes corresponds to a layout of the plurality of pads. In some embodiments, a method of testing an IC of a device comprises separating the unitary PCB into a main board portion and a flexible PCB portion, attaching the IC to the main board portion, soldering the main board portion to a platform PCB of the device, and attaching the flexible PCB portion to the main board portion.

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