The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 19, 2025

Filed:

Jun. 27, 2022
Applicant:

Advanced Micro Devices, Inc., Santa Clara, CA (US);

Inventors:

Aaron John Nygren, Boise, ID (US);

Karthik Gopalakrishnan, Cupertino, CA (US);

Tsun Ho Liu, Boston, MA (US);

Assignee:

Advanced Micro Devices, Inc., Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/40 (2006.01); G06F 1/08 (2006.01); G06F 1/10 (2006.01); G06F 3/06 (2006.01); G11C 11/4076 (2006.01); G06F 1/3234 (2019.01); G06F 1/3237 (2019.01); G06F 12/00 (2006.01); G06F 13/00 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4076 (2013.01); G06F 1/08 (2013.01); G06F 1/10 (2013.01); G06F 3/0604 (2013.01); G06F 3/0659 (2013.01); G06F 3/0671 (2013.01); G06F 1/3237 (2013.01); G06F 1/3275 (2013.01); G06F 12/00 (2013.01); G06F 13/00 (2013.01);
Abstract

A memory includes a read clock circuit and a mode register. The read clock circuit has an output for providing a hybrid read clock signal in response to a clock signal and a read clock mode signal. The mode register provides the read clock mode signal in response to a read clock mode, wherein the read clock circuit provides the hybrid read clock signal as a free-running clock signal that toggles continuously when the read clock mode is a first mode, and as a strobe signal that is active only in response to the memory receiving a read command when the read clock mode is a second mode.


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