The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 19, 2025
Filed:
Dec. 06, 2018
Western Digital Technologies, Inc., San Jose, CA (US);
Rami Rom, Zichron-Yacov, IL;
Ofir Pele, Hod Hasharon, IL;
Alexander Bazarsky, Holon, IL;
Tomer Tzvi Eliash, Kfar Saba, IL;
Ran Zamir, Ramat Gan, IL;
Karin Inbar, Ramat-Hasharon, IL;
Western Digital Technologies, Inc., San Jose, CA (US);
Abstract
Exemplary methods and apparatus are provided for implementing a deep learning accelerator (DLA) or other neural network components within the die of a non-volatile memory (NVM) apparatus using, for example, under-the-array circuit components within the die. Some aspects disclosed herein relate to configuring the under-the-array components to implement feedforward DLA operations. Other aspects relate to backpropagation operations. Still other aspects relate to using an NAND-based on-chip copy with update function to facilitate updating synaptic weights of a neural network stored on a die. Other aspects disclosed herein relate to configuring a solid state device (SSD) controller for use with the NVM. In some aspects, the SSD controller includes flash translation layer (FTL) tables configured specifically for use with neural network data stored in the NVM.