The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 19, 2025

Filed:

Mar. 01, 2024
Applicant:

Lapis Technology Co., Ltd., Yokohama, JP;

Inventor:

Hijiri Shirasaki, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/36 (2006.01); G02F 1/133 (2006.01); H03K 17/687 (2006.01);
U.S. Cl.
CPC ...
G02F 1/13306 (2013.01); G09G 3/3648 (2013.01); H03K 17/687 (2013.01); G09G 2310/0291 (2013.01); G09G 2320/0233 (2013.01); G09G 2320/041 (2013.01);
Abstract

In a driver circuit, a bias voltage generation circuit generates and outputs a bias voltage for determining a bias current of an output amplifier. A memory stores a trimming code with which a slew rate of an output voltage outputted by the output amplifier is adjusted to fall within a target range set in advance. In an adjustment mode for adjusting the slew rate, a slew rate adjustment circuit adjusts the slew rate of the output amplifier based on a trimming code inputted from a shipping inspection device. Then, in a normal operation mode, the slew rate adjustment circuit changes a resistance value based on the trimming code stored in the memory to change a bias level of the bias voltage generation circuit and adjust the slew rate of the output amplifier.


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