The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 12, 2025

Filed:

Sep. 25, 2020
Applicant:

New Silicon Corporation Pte Ltd, Singapore, SG;

Inventors:

Eugene A. Fitzgerald, Windham, NH (US);

Kenneth Eng Kian Lee, Singapore, SG;

Cheng Yeow Ng, Singapore, SG;

Fayyaz Moiz Singaporewala, Singapore, SG;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H10H 20/824 (2025.01); H01L 25/16 (2023.01); H10H 20/833 (2025.01);
U.S. Cl.
CPC ...
H10H 20/824 (2025.01); H01L 25/167 (2013.01); H10H 20/833 (2025.01);
Abstract

A method of fabricating a semiconductor device () is described. According to a described embodiment, the method comprises: (i) forming a III-V semiconductor material layer () comprising a substrate layer () and a device layer () attached to the substrate layer (); and (ii) forming an electrically conductive interlayer () to the device layer () prior to bonding the electrically conductive interlayer () to a partially processed CMOS device layer () having at least one transistor ().


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Fitzgerald, Eugene. (2025). Method for fabricating a semiconductor device including integrating iii-v device and cmos device, and the semiconductor device thereof (U.S. Patent No. 12389718). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12389718

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