The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 12, 2025

Filed:

Nov. 09, 2023
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Chiu Keung Tang, San Diego, CA (US);

Zhiqin Chen, San Diego, CA (US);

Assignee:

QUALCOMM INCORPORATED, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 27/227 (2006.01); H03L 7/18 (2006.01); H04L 27/38 (2006.01);
U.S. Cl.
CPC ...
H04L 27/2272 (2013.01); H03L 7/18 (2013.01); H04L 27/2273 (2013.01); H04L 27/3854 (2013.01);
Abstract

A method for generating clock signals includes dividing an input clock signal to obtain a first in-phase output clock signal, dividing an inverted version of the input clock signal to obtain a first quadrature output clock signal, delaying edges in the input clock signal to obtain a second quadrature output clock signal, selecting a full-rate output to provide a multiphase output clock in a first mode of operation, and selecting a half-rate output to provide the multiphase output clock in a second mode of operation. The first quadrature output clock signal is a quadrature version of the first in-phase output clock signal. The first in-phase output clock signal and the first quadrature output clock signal are included in the full-rate output. The second quadrature output clock signal is included in the half-rate output and is a quadrature version of the input clock signal.


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