The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 12, 2025

Filed:

Nov. 10, 2020
Applicant:

Applied Materials, Inc., Santa Clara, CA (US);

Inventors:

Gautam K. Hemani, San Jose, CA (US);

Khokan Chandra Paul, Cupertino, CA (US);

Assignee:

Applied Materials, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/67 (2006.01); G01N 21/95 (2006.01); H01L 21/66 (2006.01);
U.S. Cl.
CPC ...
H01L 21/67288 (2013.01); G01N 21/9505 (2013.01); H01L 21/67063 (2013.01); H01L 22/20 (2013.01);
Abstract

Methods of controlling stress non-uniformity for semiconductor processing may include reflecting light off a surface of a wafer with an optical imaging device disposed within a cluster tool. The cluster tool may include a multi-chamber processing system. The methods may include collecting one or more color images of the surface of the wafer. The methods may include converting the one or more color images to sample stress intensity data comparing the sample stress intensity data to reference wafer stress intensity data. The methods may include identifying deviations of the sample stress intensity data relative to the reference wafer stress intensity data. The methods may include determining corrective actions for bringing the sample stress intensity data into conformity with the reference wafer stress intensity data. The methods may include implementing the corrective actions on the multi-chamber processing system.


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