The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 12, 2025
Filed:
May. 07, 2021
New York University IN Abu Dhabi Corporation, Abu Dhabi, AE;
Ozgur Sinanoglu, Abu Dhabi, AE;
New York University in Abu Dhabi Corporation, Abu Dhabi, AE;
Abstract
Exemplary system, method, and computer-accessible medium for protecting at least one logic-locked integrated circuit (IC) design can include, for example, receiving a request(s), and swapping a correct key which is configured to unlock the logic-locked IC design(s) with an incorrect key which is configured to corrupt an output(s) of the logic-locked IC design(s) after receipt of the request(s). The request(s) can be a test access request(s). The correct key can be utilized when the logic-locked IC design(s) can be initially powered on. The correct key can be swapped with the incorrect key using multiplexer(s) or register(s). In addition, exemplary system, method, and computer-accessible medium can be provided for logic-locking a logic design by, randomly replacing randomly-selected inverters in the logic design with XOR or XNOR key-gates, and inserting XOR or XNOR key-gates randomly in randomly-selected locations in the logic design where there is no inverter.