The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 05, 2025

Filed:

Feb. 28, 2022
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Henry Litzmann Edwards, Garland, TX (US);

Narayana Sateesh Pillai, Murphy, TX (US);

Gangqiang Zhang, Plano, TX (US);

Angelo William Pereira, Allen, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H10D 30/65 (2025.01); H10D 30/01 (2025.01);
U.S. Cl.
CPC ...
H10D 30/659 (2025.01); H10D 30/0281 (2025.01);
Abstract

An integrated circuit includes a first field effect transistor (FET) and a second FET formed in or over a semiconductor substrate and configured to selectively conduct a current between a first circuit node and a second circuit node. The first FET has a first source, a first drain and a first buried layer all having a first conductivity type, and a first gate between the first source and the first drain. The second FET has a second source, a second drain and a second buried layer all having the first conductivity type, and a second gate between the second source and the second drain. A first potential between the first source and the first buried layer is configurable independently from a second potential between the second source and the second buried layer.


Find Patent Forward Citations

Loading…