The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 05, 2025
Filed:
Jan. 29, 2024
Qualcomm Incorporated, San Diego, CA (US);
Ahmed Attia Abotabl, San Diego, CA (US);
Muhammad Sayed Khairy Abdelghaffar, San Jose, CA (US);
Huilin Xu, Temecula, CA (US);
Wanshi Chen, San Diego, CA (US);
Krishna Kiran Mukkavilli, San Diego, CA (US);
Tingfang Ji, San Diego, CA (US);
Shimman Arvind Patel, San Diego, CA (US);
QUALCOMM Incorporated, San Diego, CA (US);
Abstract
Full-duplex communication techniques are described. Some aspects may utilize full-duplex-slot formats, such as may be provided in addition to or in the alternative to uplink, downlink, and flexible slot formats. A full-duplex slot implemented in accordance with a full-duplex-slot format provides a slot in which the frequency band may be used for both uplink and downlink transmissions. Downlink and/or uplink transmissions of a full-duplex slot may occur in overlapping frequency bands or in adjacent frequency bands. A first wireless device may transmit slot signaling comprising one or more full-duplex-slot-indicator parameters. A second wireless device may base one or more full-duplex slot configuration determinations on a full-duplex-slot configuration. The second wireless device may apply one or more full-duplex-slot-indicator-parameter rules with respect to full-duplex-slot-indicator parameters for determining a full-duplex-slot format. Other aspects and features are also claimed and described.