Transmitter circuit and receiver circuit of interface circuit and operating method thereof

Abstract

A transmitter circuit of an interface circuit includes a clock generating circuit, a pulse generating circuit, an overlapped multiplexing circuit, and an output circuit. The clock generating circuit generates a plurality of clocks having different phases. The pulse generating circuit generates a plurality of pulses based on the plurality of clocks. The overlapped multiplexing circuit receives a plurality of input signals in parallel, and sequentially outputs a plurality of overlapped signals based on the plurality of clocks, the plurality of input signals, and the plurality of pulses, and each overlapped signal includes bit values of two input signals among the plurality of input signals. The output circuit serially outputs bit values of the plurality of input signals in series based on the plurality of overlapped signal.