Reconfigurable clockless single flux quantum logic circuitry

Abstract

A device comprises a clockless single flux quantum (SFQ) logic circuit comprising input and output stages and a configurable logic circuit which comprises at least one configurable logic gate that holds an internal state. The input stage comprises a signal input converter circuit which receives a two-level input signal and generates an SFQ pulse on each rising and falling edge of the two-level input signal. The configurable logic circuit performs logic operations using SFQ pulses from the input stage, and outputs SFQ pulses to the output stage which comprises a signal output converter circuit that converts each output SFQ pulse into a two-level output signal. The signal output converter circuit holds an internal state. The configurable logic circuit is configurable to implement a logic function by initializing the internal state of the signal output converter circuit and/or the internal state of the at least one configurable logic gate.