The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 29, 2025

Filed:

Apr. 10, 2024
Applicant:

Samsung Display Co., Ltd., Yongin-si, KR;

Inventors:

Kyung Ho Kim, Yongin-si, KR;

Sang Yong No, Yongin-si, KR;

Assignee:

Samsung Display Co., Ltd., Yongin-si, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G 3/3266 (2016.01); G09G 3/32 (2016.01);
U.S. Cl.
CPC ...
G09G 3/3266 (2013.01); G09G 3/32 (2013.01); G09G 2300/0861 (2013.01); G09G 2310/0267 (2013.01); G09G 2310/08 (2013.01); G09G 2330/021 (2013.01);
Abstract

A stage circuit includes: an output unit connected to a first power input terminal and a second power input terminal, the output unit outputting an enable output signal to a first output terminal and an enable carry signal to a second output terminal; a first driver connected to the first power input terminal, the second power input terminal, a clock input terminal, and a second input terminal; and a second driver connected to a first input terminal, the second input terminal, the first power input terminal, and the clock input terminal, the second driver controlling a voltage of the first node. The second driver includes: a first transistor connected between the first node and the clock input terminal, the first transistor including a gate electrode connected to a control node; and a control transistor and a first capacitor, connected in series between the control node and the clock input terminal.


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