The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 29, 2025

Filed:

Oct. 31, 2023
Applicant:

Dell Products L.p., Round Rock, TX (US);

Inventors:

Ching-Lung Chao, Austin, TX (US);

Shih-Hao Wang, Austin, TX (US);

Po-Yu Cheng, Tainan, TW;

Assignee:

Dell Products L.P., Round Rock, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 11/07 (2006.01);
U.S. Cl.
CPC ...
G06F 11/008 (2013.01); G06F 11/073 (2013.01); G06F 11/0793 (2013.01);
Abstract

A Reliability, Availability and Serviceability (RAS) offload Post-Package Repair (PPR) request system includes a memory system coupled to a Baseboard Management Controller (BMC) device and a Basic Input/Output System (BIOS) subsystem. The BMC device identifies an error in the memory system, retrieves error information associated with the error, uses the error information to generate a Post-Package Repair (PPR) request, and stores the PPR request in a BMC database provided in the BMC device. During an initialization process that occurs subsequent to storing the PPR request in the BMC database, the BMC device retrieves the PPR request and stores it in a shared buffer subsystem. During the initialization process, the BIOS retrieves the PPR request from the shared buffer subsystem, stores the PPR request in a BIOS database provided in the BIOS subsystem, and performs PPR operations on the memory system based on the PPR request stored in the BIOS database.


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