The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 22, 2025

Filed:

Apr. 12, 2023
Applicant:

Shenzhen Microbt Electronics Technology Co., Ltd., Guangdong, CN;

Inventors:

Zhijun Fan, Guangdong, CN;

Wenbo Tian, Guangdong, CN;

Weixin Kong, Guangdong, CN;

Zuoxing Yang, Guangdong, CN;

Haifeng Guo, Guangdong, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/012 (2006.01); G01R 31/3185 (2006.01); H03K 3/037 (2006.01); H03K 3/356 (2006.01);
U.S. Cl.
CPC ...
H03K 3/356156 (2013.01); G01R 31/318541 (2013.01); H03K 3/012 (2013.01); H03K 3/037 (2013.01); H03K 3/35606 (2013.01);
Abstract

The present disclosure relates to a D flip-flop having a multiplexer function, including: a first transmission gate whose data input end is configured to receive a first data signal and whose clock input end is configured to receive a first clock signal; a second transmission gate whose data input end is configured to receive a second data signal and whose clock input end is configured to receive a second clock signal; an inverted latch unit whose data input end is connected to an output end of the first transmission gate and an output end of the second transmission gate and whose clock input end is configured to receive a third clock signal; and an inverter whose input end is connected to an output end of the inverted latch unit and whose output end provides an output of the D flip-flop.


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