The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 22, 2025

Filed:

Apr. 02, 2024
Applicant:

Stmicroelectronics S.r.l., Agrate Brianza, IT;

Inventor:

Paolo Crema, Vimercate, IT;

Assignee:

STMicroelectronics S.r.l., Agrate Brianza, IT;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 21/4842 (2013.01); H01L 21/565 (2013.01); H01L 23/3107 (2013.01); H01L 23/49503 (2013.01); H01L 23/49575 (2013.01);
Abstract

An multi-die semiconductor device disclosed herein includes a metallic leadframe with a central die pad encircled by electrically-conductive leads. Mounted on the die pad are two semiconductor dice, each with dedicated bonding pads on the surfaces facing away from the die pad. A layer of laser-activatable material is precisely molded over the dice and the leadframe. This layer forms a network of laser-activated lines: the first subset establishes electrical connections between the dice bonding pads and the leadframe leads, while the second subset interconnects the bonding pads of the first die to those of the second. There are two distinct metallic layers; the lower one, directly on the laser-activated lines, is formed of electroless-plated material, and the upper one, enhancing the structure, is formed of electroplated material, thus providing robust and reliable interconnections within the device.


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