The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 22, 2025

Filed:

Jul. 25, 2023
Applicant:

Sandisk Technologies Llc, Addison, TX (US);

Inventor:

Yuki Mizutani, San Jose, CA (US);

Assignee:

Sandisk Technologies, Inc., Milpitas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01); G11C 5/06 (2006.01); H01L 25/065 (2023.01); H10B 41/10 (2023.01); H10B 41/20 (2023.01); H10B 41/35 (2023.01); H10B 41/40 (2023.01); H10B 43/10 (2023.01); H10B 43/20 (2023.01); H10B 43/35 (2023.01); H10B 43/40 (2023.01); H10B 80/00 (2023.01);
U.S. Cl.
CPC ...
G11C 16/0483 (2013.01); G11C 5/063 (2013.01); H01L 25/0657 (2013.01); H10B 41/10 (2023.02); H10B 41/20 (2023.02); H10B 41/35 (2023.02); H10B 41/40 (2023.02); H10B 43/10 (2023.02); H10B 43/20 (2023.02); H10B 43/35 (2023.02); H10B 43/40 (2023.02); H10B 80/00 (2023.02); H01L 2225/06506 (2013.01);
Abstract

Technology is disclosed herein for memory device with control circuitry having an efficient floorplan. Control circuitry resides in a control semiconductor die that is bonded to a memory die NAND strings extending in a z-direction. The memory die has bit lines extending across the NAND strings in an x-direction. First column control circuitry is connected to and configured to control a first set of bit lines. Second column control circuitry is connected to and configured to control a second set of bit lines. The second column control circuitry is stacked in an x-direction with the first column control circuitry. The control die also has system control circuitry configured to control the first column control circuitry and the second column control circuitry. The system control circuitry resides in the floorplan beside the stacked column control circuitry to allow for additional routing of electrical connections above the system control circuitry.


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