The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 15, 2025
Filed:
Jun. 14, 2022
Applicant:
Asm Ip Holding B.v., Almere, NL;
Inventors:
Joe Margetis, Gilbert, AZ (US);
John Tolle, Gilbert, AZ (US);
Assignee:
ASM IP Holding B.V., Almere 1322 AP, NL;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 21/285 (2006.01); H01L 23/535 (2006.01); H10D 30/01 (2025.01); H10D 30/62 (2025.01); H10D 30/69 (2025.01); H10D 62/00 (2025.01); H10D 62/13 (2025.01); H10D 62/834 (2025.01); H10D 62/822 (2025.01); H10D 62/832 (2025.01); H10D 64/62 (2025.01);
U.S. Cl.
CPC ...
H10D 62/021 (2025.01); H01L 21/02529 (2013.01); H01L 21/02532 (2013.01); H01L 21/02535 (2013.01); H01L 21/02579 (2013.01); H01L 21/0262 (2013.01); H01L 21/02636 (2013.01); H01L 21/28518 (2013.01); H01L 23/535 (2013.01); H10D 30/024 (2025.01); H10D 30/6211 (2025.01); H10D 30/797 (2025.01); H10D 62/151 (2025.01); H10D 62/834 (2025.01); H10D 30/0212 (2025.01); H10D 62/822 (2025.01); H10D 62/832 (2025.01); H10D 64/62 (2025.01);
Abstract
A method for depositing a Group IV semiconductor is disclosed. The method may include, providing a substrate within a reaction chamber and heating the substrate to a deposition temperature. The methods may further include, exposing the substrate to at least one Group IV precursor and exposing the substrate to at least one Group IIIA metalorganic dopant precursor. The methods may further include depositing a Group IV semiconductor on a surface of the substrate. Semiconductor device structures including a Group IV semiconductor deposited by the methods of the disclosure are also provided.