The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 15, 2025

Filed:

Jul. 13, 2023
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Ashim Dutta, Menands, NY (US);

Ekmini Anuja De Silva, Slingerlands, NY (US);

Chih-Chao Yang, Glenmont, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 61/00 (2023.01); H01L 23/532 (2006.01); H10N 50/01 (2023.01); H10N 50/10 (2023.01); H10N 50/80 (2023.01);
U.S. Cl.
CPC ...
H10B 61/00 (2023.02); H01L 23/53209 (2013.01); H10N 50/01 (2023.02); H10N 50/10 (2023.02); H10N 50/80 (2023.02);
Abstract

A semiconductor device structure includes a metallization stack comprising one or more patterned metal layers. A bi-layer dielectric cap is disposed on and in contact with the metallization stack. At least one memory device is disposed on the bi-layer dielectric cap. A method for forming the metallization stack includes receiving a structure comprising a metallization layer and a first dielectric cap layer formed over the metallization layer. The metallization layer includes a logic area and a memory area. At least one memory stack is formed over the first dielectric cap layer. A self-assembled monolayer is formed over and in contact with the memory stack. A second dielectric cap layer is formed on and in contact with the first dielectric cap layer. The second dielectric cap layer is not formed on the self-assembled monolayer.


Find Patent Forward Citations

Loading…