Semiconductor device having a through electrode penetrating mold layers formed in an extension area

Abstract

A semiconductor device includes a substrate including cell array, extension, and through electrode areas; a memory stack on the substrate and including first gate electrodes, insulating layers, and mold layers, the first gate electrodes and the insulating layers being sequentially stacked, and the mold layers including an insulating material and being on the through electrode area at a same level as the first gate electrodes; a channel structure vertically penetrating the first gate electrodes; a through electrode vertically penetrating the mold layers; first isolation insulating layers vertically penetrating the memory stack, extending in a first direction, and being spaced apart from each other in a second direction; and a second isolation insulating layer between the channel structure and the through electrode area and extending in the second direction and vertically penetrating the first gate electrodes, and in plan view, the second isolation insulating layer intersects the first isolation insulating layers.