The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 15, 2025

Filed:

Jun. 21, 2023
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Xiahan Zhou, San Diego, CA (US);

Haibo Fei, San Diego, CA (US);

Nitz Saputra, Burlingame, CA (US);

Andrew Weil, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/74 (2006.01);
U.S. Cl.
CPC ...
H03M 1/74 (2013.01);
Abstract

Certain aspects of the present disclosure generally relate to a digital-to-analog converter (DAC) circuit implemented with a dynamic stacked transistor architecture. The DAC circuit generally includes a first current-steering transistor and a second current-steering transistor. The DAC circuit may also include: a first stacked transistor coupled between the first current-steering transistor and a first output of the DAC circuit; a first switch coupled between a gate of the first stacked transistor and a bias voltage node; a second switch coupled between the gate of the first stacked transistor and a voltage rail; a second stacked transistor coupled between the second current-steering transistor and a second output of the DAC circuit; a third switch coupled between a gate of the second stacked transistor and the bias voltage node; and a fourth switch coupled between the gate of the second stacked transistor and the voltage rail.


Find Patent Forward Citations

Loading…