The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 15, 2025
Filed:
Jul. 26, 2023
Stmicroelectronics S.r.l., Agrate Brianza, IT;
Alma Mater Studiorum—universita' Di Bologna, Bologna, IT;
Matteo D'Addato, Sasso Marconi, IT;
Alessia Maria Elgani, Pavia, IT;
Luca Perilli, Teramo, IT;
Eleonora Franchi Scarselli, Bologna, IT;
Antonio Gnudi, Bologna, IT;
Roberto Antonio Canegallo, Rimini, IT;
Giulio Ricotti, Broni, IT;
STMicroelectronics S.r.l., Agrate Brianza, IT;
Alma Mater Studiorum—Universita' Di Bologna, Bologna, IT;
Abstract
A circuit includes a clock input node, a first signal input node configured to receive a first modulated signal switching between a first DC voltage and a second DC voltage, a bias circuit, a first output node, a first capacitor, a second capacitor, and switching circuitry coupled to the first capacitor and the second capacitor. Control circuitry is configured to initially set the switching circuitry in a first configuration in response to the first modulated signal having the second DC voltage, thereby charging the first capacitor to the second DC voltage and charging the second capacitor to the first DC voltage, and subsequently set the switching circuitry in a second configuration in response to an edge detected in the clock signal, thereby producing the first threshold voltage at the first output node after charge redistribution taking place between the first and second capacitors.