The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 15, 2025

Filed:

Jan. 31, 2022
Applicant:

Boe Technology Group Co., Ltd., Beijing, CN;

Inventors:

Hongwei Tian, Beijing, CN;

Yanan Niu, Beijing, CN;

Chunyang Wang, Beijing, CN;

Dong Li, Beijing, CN;

Zheng Liu, Beijing, CN;

Shuai Zhang, Beijing, CN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10K 59/131 (2023.01); G09G 3/3266 (2016.01); H10K 50/86 (2023.01); H10K 59/121 (2023.01); H10K 59/80 (2023.01);
U.S. Cl.
CPC ...
G09G 3/3266 (2013.01); H10K 50/865 (2023.02); H10K 59/1213 (2023.02); H10K 59/131 (2023.02); H10K 59/8792 (2023.02); G09G 2310/0286 (2013.01);
Abstract

A display substrate having a display area and a gate-on-array (GOA) area outside the display area is provided. The display substrate includes a base substrate; a plurality of GOA signal lines on the base substrate and in the GOA area; and a first signal line in the GOA area, at least a portion of the first signal line being on a side of the plurality of GOA signal lines away from the base substrate. An orthographic projection of the first signal line on the base substrate at least partially covers an orthographic projection of at least one of a first clock signal line, a second clock signal line, a start signal line, a high voltage power line, or a low voltage power line on the base substrate.


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