The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 15, 2025
Filed:
Jun. 05, 2024
Celerint, Llc, New York, NY (US);
Howard H. Roberts, Jr., Austin, TX (US);
LeRoy Growt, Kyle, TX (US);
Thomas Schoen, Austin, TX (US);
CELERINT, LLC, New York, NY (US);
Abstract
A method is provided for determining a decoupling capacitance of a device under test (DUT) interface circuitry, which is between automated testing equipment (ATE) and a DUT. The method: disconnects the DUT from the DUT interface circuitry; connects a Device Under Testing Power Supply (DPS) resource as a DUT Power Supply to the DUT interface circuitry; sets a current clamp of the DPS resource to a test application level; turns off the DPS resource voltage; sets the DPS resource to a force voltage mode; sets the current clamp to a minimum current level; turns on the output; waits a period of time to allow the decoupling capacitance to charge; places the DPS resource into a voltage measurement mode; adds any delay time to the period of time; measures the voltage before the capacitance is fully charged; and determines the decoupling capacitance.