The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 15, 2025
Filed:
Apr. 20, 2023
Nvidia Corporation, Santa Clara, CA (US);
Miguel Rodriguez, Santa Clara, CA (US);
Suhas Satheesh, Santa Clara, CA (US);
Tezaswi Raja, Santa Clara, CA (US);
Nishit Harshad Shah, Santa Clara, CA (US);
NVIDIA Corporation, Santa Clara, CA (US);
Abstract
Circuitry and a method of determining electrical characteristics of material local to a specific area of a semiconductor wafer is disclosed. In one embodiment, an IC is disclosed that comprises at least one processing subsystem and at least one integrated common current monitor (ICCM) located within the processing subsystem(s). In one embodiment, the ICCM includes current-to-voltage conversion circuitry that converts a current throughput (I) of a selected at least one of the plurality of DUTs to a corresponding voltage for a plurality of regulated drain-to-source voltages (V) across the selected DUT(s). In one embodiment, the ICCM is configured to determine a duty cycle of a voltage that corresponds to the Iand Irepresents electrical characteristics of material local to an area of a semiconductor wafer specific to a location where the ICCM is located.