The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 08, 2025

Filed:

Sep. 18, 2024
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

Xin Miao, Saratoga, CA (US);

Emre Alptekin, Santa Clara, CA (US);

Assignee:

Apple Inc., Cupertino, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H10D 84/85 (2025.01); H10D 64/27 (2025.01); H10D 64/66 (2025.01); H10D 84/01 (2025.01); H10D 89/10 (2025.01);
U.S. Cl.
CPC ...
H10D 84/856 (2025.01); H10D 64/517 (2025.01); H10D 64/667 (2025.01); H10D 84/0135 (2025.01); H10D 84/014 (2025.01); H10D 84/85 (2025.01); H10D 84/853 (2025.01); H10D 89/10 (2025.01);
Abstract

Device layouts for integrated circuit devices that include threshold voltage shift induced by placement of alternate work function metals adjacent active gates are disclosed. The device layouts include a single epitaxy for active regions in the device with common source/drain regions among the active region rows in the layouts. Metal gate sections above one or more rows of active regions may be replaced with metal of a different work function in inactive regions of the layout. The different work function metal in the inactive regions will induce threshold voltage shift in adjacent (neighboring) active transistors of the device layouts.


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