The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 08, 2025

Filed:

Dec. 17, 2021
Applicant:

Marvell Asia Pte, Ltd., Singapore, SG;

Inventors:

Yuanbin Guo, Mountain House, CA (US);

Hong Jik Kim, San Jose, CA (US);

Assignee:

Marvell Asia Pte, Ltd., Singapore, SG;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H04L 12/26 (2006.01); H04L 5/00 (2006.01); H04L 27/26 (2006.01);
U.S. Cl.
CPC ...
H04L 5/0048 (2013.01); H04L 5/0046 (2013.01); H04L 27/2602 (2013.01); H04L 27/26134 (2021.01);
Abstract

Methods and apparatus for symbol-to-symbol multiplexing of control, data, and reference signals on a 5G uplink. In one aspect, a job descriptor generator is configured to calculate mapping parameters for each symbol based on high level configuration parameters. A data/UCI multiplexing job engine, which is coupled to the job descriptor generator, provides symbol-based multiplexing and mapping which includes calculating reserved locations for PTRS and DMRS based on frequency-domain mapping of both PTRS and DMRS and multiplexing of data and controls from calculated intermediate parameters. A downstream processor is coupled to the job engine and configured to modulate data and control REs and insert DMRS or PTRS. In one example, the job descriptor generator is a configurable DSP processor and the job engine is an ASIC hardware accelerator.


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