The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 08, 2025

Filed:

Jan. 31, 2023
Applicant:

Monolithic Power Systems, Inc., San Jose, CA (US);

Inventors:

Di Han, San Jose, CA (US);

Jian Jiang, Los Gatos, CA (US);

Assignee:

Monolithic Power Systems, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02M 3/158 (2006.01); H02M 3/157 (2006.01);
U.S. Cl.
CPC ...
H02M 3/1586 (2021.05); H02M 3/157 (2013.01);
Abstract

A control circuit for controlling a multi-level buck converter having N pairs of switches serially connected between an input terminal and a logic ground, wherein N is an integer equal to or greater than 2. The control circuit has a comparing circuit, a selecting circuit and a delay circuit. The comparing circuit compares a voltage feedback signal indicative of an output voltage signal of the multi-level buck converter with a reference signal to generate a comparing signal. The selecting circuit generates N set signals based on the comparing signal. The delay circuit delays the N set signals to provide N delay set signals to control the N pairs of switches when the output voltage signal falls in of an input voltage signal of the multi-level buck converter, of the input voltage signal, . . . , or of the input voltage signal, wherein k is a proportional coefficient.


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