The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 08, 2025

Filed:

Jan. 24, 2022
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Seungyoon Kim, Seoul, KR;

Junghoon Jun, Hwaseong-si, KR;

Sanghun Chun, Suwon-si, KR;

Jeehoon Han, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 25/065 (2023.01); H01L 23/00 (2006.01); H01L 25/18 (2023.01); H10B 41/27 (2023.01); H10B 43/27 (2023.01);
U.S. Cl.
CPC ...
H01L 25/0657 (2013.01); H01L 24/05 (2013.01); H01L 25/18 (2013.01); H01L 24/08 (2013.01); H01L 2224/05007 (2013.01); H01L 2224/05009 (2013.01); H01L 2224/05011 (2013.01); H01L 2224/05016 (2013.01); H01L 2224/05078 (2013.01); H01L 2224/05124 (2013.01); H01L 2224/05138 (2013.01); H01L 2224/05147 (2013.01); H01L 2224/05166 (2013.01); H01L 2224/05181 (2013.01); H01L 2224/05184 (2013.01); H01L 2224/05186 (2013.01); H01L 2224/05562 (2013.01); H01L 2224/05573 (2013.01); H01L 2224/05666 (2013.01); H01L 2224/05681 (2013.01); H01L 2224/05686 (2013.01); H01L 2224/08146 (2013.01); H01L 2225/06544 (2013.01); H01L 2924/01014 (2013.01); H10B 41/27 (2023.02); H10B 43/27 (2023.02);
Abstract

A semiconductor memory device including a substrate, first pad layers and a second pad layer on the substrate, a pattern structure including first openings on the first pad layers and a second opening on the second pad layer, and having first and second regions, gate electrodes on the pattern structure and each including a pad region, channel structures penetrating through the gate electrodes in the first region, gate contact plugs electrically connected to the gate electrodes through the pad region of each of the gate electrodes and extending in a vertical direction to penetrate the first openings and connected to the first pad layers, a source contact plug, extending in the vertical direction penetrating the second opening and connected to the second pad layer, and a source connection patter under the pattern structure and in contact with the source contact plug and the second pad layer may be provided.


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