The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 08, 2025
Filed:
Jul. 26, 2022
Apple Inc., Cupertino, CA (US);
John J. Sullivan, Sunnyvale, CA (US);
James M. Hollabaugh, San Jose, CA (US);
Jason W. Brinsfield, San Francisco, CA (US);
Calvin M. Ryan, Berkeley, CA (US);
Andreas Adler, Schlierbach, DE;
Apple Inc., Cupertino, CA (US);
Abstract
Techniques for protecting non-volatile memory (NVM) from power cycle interruptions during memory operations are disclosed. A power management integrated circuit (PMIC) coupled to a memory circuit with NVM implements the various techniques disclosed. When a power reset signal is asserted to a PMIC, the PMIC may delay initiation of the power reset cycle when it detects that the NVM coupled to the PMIC is active to prevent corruption of the NVM by the power reset cycle. The PMIC may detect the activity level of the NVM based on an activity output signal that indicates whether the NVM is active (e.g., programming or erasing) or inactive.