The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 08, 2025

Filed:

Oct. 20, 2021
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Pranav Agrawal, Hyderabad, IN;

Akash Suthar, Sirohi, IN;

Aman Chhetry, Hazaribagh, IN;

Kunal Desai, Bangalore, IN;

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01); G11C 11/406 (2006.01);
U.S. Cl.
CPC ...
G11C 11/40618 (2013.01); G11C 11/40615 (2013.01);
Abstract

A kernel of an HLOS may originate one or more memory refresh requests. Each memory refresh request may have a first memory address range and a size value. A resource power manager may be coupled to the kernel and coupled to memory. The memory may have a plurality of memory ranks. The resource power manger may receive a memory refresh request from the kernel. The resource power manager may then determine if the plurality of memory ranks is either symmetrical or asymmetrical. If the memory ranks are symmetrical, then the resource power manager distributes the memory refresh request evenly and in a parallel manner across the symmetrical memory ranks. If the memory ranks are asymmetrical, then the resource power manager will then determine if the memory refresh request should be one of: a linear only memory refresh; an interleave with linear memory refresh; or an interleave only memory refresh.


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