The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 08, 2025
Filed:
Jul. 18, 2022
Samsung Electronics Co., Ltd., Suwon-si, KR;
Hyungseok Yu, Suwon-si, KR;
Taeho Kim, Suwon-si, KR;
Jungmin Park, Suwon-si, KR;
Hyun Seo, Suwon-si, KR;
Shinjae Lee, Suwon-si, KR;
Kwangsik Choi, Suwon-si, KR;
Seyoung Choi, Suwon-si, KR;
Yurak Choe, Suwon-si, KR;
Samsung Electronics Co., Ltd., Suwon-si, KR;
Abstract
An electronic device may include a memory and at least one processor operatively connected with the memory. The at least one processor, including processing circuitry, may run a user application in a first area operating with a first permission and run an operating system in a second area operating with a second permission higher than the first permission. The memory stores instructions configured to, when executed, cause the at least one processor to detect an operation of at least one first device included in the electronic device, in a third area operating with a third permission higher than the second permission, deliver a detection signal for the at least one first device to a fourth area, an execution environment of which is separated from the first area, the second area, and the third area, in the third area, and provide a notification that the at least one first device is operating using at least one specified second device, in the fourth area. The fourth area may be an area on a second virtual machine, an execution environment of which is separated from the first area and the second area being areas on a first virtual machine by a hypervisor executed in the third area.