The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 01, 2025
Filed:
Aug. 19, 2021
Samsung Electronics Co., Ltd., Suwon-si, KR;
Byungeun Yun, Hwaseong-si, KR;
Jun-Gu Kang, Hwaseong-si, KR;
Dong-Il Park, Hwaseong-si, KR;
Yongsang Jeong, Hwaseong-si, KR;
SAMSUNG ELECTRONICS CO., LTD., Suwon-si, KR;
Abstract
A method for forming a semiconductor device includes: providing a substrate including a first and second region; forming a first gate dielectric pattern and a first gate electrode on the first region; forming a second gate dielectric pattern and a second gate electrode on the second region; forming an interlayer dielectric layer on the substrate; forming first source/drain contact holes penetrating the interlayer dielectric layer on the first region; and forming second source/drain contact holes penetrating the interlayer dielectric layer on the second region. A thickness of the second gate dielectric pattern is greater than a thickness of the first gate dielectric pattern. A height of each of the second source/drain contact holes is greater than a height of each of the first source/drain contact holes. A width of each of the second source/drain contact holes is greater than a width of each of the first source/drain contact holes.