The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 01, 2025

Filed:

Mar. 15, 2022
Applicant:

The Boeing Company, Chicago, IL (US);

Inventors:

Chris M. Thomas, Playa Vista, CA (US);

Brian K. Kormanyos, Edmonds, WA (US);

Assignee:

The Boeing Company, Arlington, VA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 1/02 (2006.01); H03F 1/22 (2006.01); H03F 1/30 (2006.01);
U.S. Cl.
CPC ...
H03F 1/301 (2013.01); H03F 1/0211 (2013.01); H03F 1/223 (2013.01); H03F 1/302 (2013.01); H03F 2200/447 (2013.01); H03F 2200/555 (2013.01);
Abstract

An open loop process and temperature independent bias circuit for stacked device amplifiers is disclosed herein. In one or more embodiments, a method for biasing a stacked high-voltage signal amplifier with a voltage divider bias module comprises generating, by the voltage divider bias module from a power supply voltage (VDD), a plurality of control voltage biases, which comprise a plurality of voltage references plus an offset voltage term (Vtemp). In one or more embodiments, the plurality of voltage references are each proportional to a division of the power supply voltage (VDD), and the offset voltage term (Vtemp) is proportional to temperature and is a function of process variation. The method further comprises biasing, a plurality of devices of the stacked high-voltage signal amplifier, with the control voltage biases.


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