The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 01, 2025

Filed:

Nov. 29, 2023
Applicant:

Samsung Display Co., Ltd., Yongin-si, KR;

Inventor:

Hong-Kyu Kim, Yongin-si, KR;

Assignee:

SAMSUNG DISPLAY CO., LTD., Yongin-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/3266 (2016.01); G09G 3/20 (2006.01); G09G 3/3233 (2016.01);
U.S. Cl.
CPC ...
G09G 3/3266 (2013.01); G09G 3/2096 (2013.01); G09G 3/3233 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0842 (2013.01); G09G 2310/0286 (2013.01); G09G 2310/08 (2013.01);
Abstract

A gate driver includes M active stages configured to generate first through M-th carry signals and first through M-th gate signals based on clock signals, where M is an integer greater than or equal to 4, and K back dummy stages configured to generate (M+1)-th through (M+K)-th carry signals based on the clock signals, where K is an integer greater than or equal to 3. An N-th active stage of the M active stages discharges a control node of the N-th active stage based on an (N+3)-th carry signal, where N is an integer greater than or equal to 1, and is less than or equal to M. At least one back dummy stage of the K back dummy stages discharges a control node of the at least one back dummy stage based on a corresponding clock signal of the clock signals.


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