The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 01, 2025

Filed:

Mar. 30, 2021
Applicant:

Amazon Technologies, Inc., Seattle, WA (US);

Inventors:

Siddharth Malkani, Leander, TX (US);

Horace Lau, Mountain View, CA (US);

Sundeep Amirineni, Austin, TX (US);

Dana Michelle Vantrease, Austin, TX (US);

Assignee:

Amazon Technologies, Inc., Seattle, WA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/331 (2020.01);
U.S. Cl.
CPC ...
G06F 30/331 (2020.01);
Abstract

A technique to stress test an integrated circuit design under test in a simulation environment may include running a simulation that includes providing bus interface transactions and idle cycles on a bus interface of an integrated circuit design. The technique may further include capturing bus interface activity on the bus interface during the simulation to generate a stimulus file and replaying the simulation by executing a test bench driver that reads the stimulus file and injects the bus interface transactions with modified idle cycles onto the bus interface of the integrated circuit design.


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