The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 01, 2025

Filed:

Aug. 31, 2023
Applicant:

Kioxia Corporation, Tokyo, JP;

Inventor:

Mikio Shiraishi, Yokohama Kanagawa, JP;

Assignee:

KIOXIA CORPORATION, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/3193 (2006.01); G01R 31/317 (2006.01);
U.S. Cl.
CPC ...
G01R 31/31932 (2013.01); G01R 31/31727 (2013.01); G01R 31/31935 (2013.01);
Abstract

A determination device includes an estimation circuit and a determination circuit. The estimation circuit generates estimation data by estimating input data in the n-th cycle based on the input data in cycles prior to the n-th cycle and a first generator polynomial. The determination circuit determines whether the input data and the estimation data match. The first generator polynomial is an arithmetic expression that sets the estimation data in the n-th cycle to an inverted value of the input data in (n−1)-th cycle if a logical sum of all the input data in a first period corresponding to a preset number of cycles prior to the n-th cycle is 0 or a logical product of all the input data in a second period corresponding to the preset number of cycles prior to the n-th cycle is 1, and sets the estimation data in the n-th cycle to the same value as the input data in the (n−1)-th cycle if the logical sum is not 0 and the logical product is not 1.


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